| Title |
Analysis of electrical properties of two-step annealed polycrystalline silicon thin film transistors |
| Keywords |
Polyerystalline Silicon ; Thin Film Transisors(TFTs) ; Furnace Annealing ; Excimer Laser Annealing ; Two-step Annealing ; Gran Boundary ; In-grain Defects |
| Abstract |
The amorphous silicon films deposited by low pressure chemical vapor deposition are crystallized by the various annealing techniques including low-temperature furnace annealing and two-step annealing. Two-step annealing is the combination of furnace annealing at 600 [.deg. C] for 24 h and the sequential furnace annealing at 950 [.deg. C] 1h or the excimer laser annealing. It s found that two-step annealings reduce the in-grain defects significantly without changing the grain boundary structure. The performance of the poly-Si thin film transistors (TFTs) produced by employing the tow-step annealing has been improved significantly compared with those of one-step annealing. (author). 13 refs., 6 figs., 1 tab. |