| Title |
Effects of Electrical Stress on Polysilicon TFTs with Hydrogen Passivation |
| Authors |
황성수(Hwang, Seong-Su) ; 황한욱(Hwang, Han-Uk) ; 김용상(Kim, Yong-Sang) |
| Keywords |
Hydrogenation ; Polycrystalline Silicon ; Thin-film transistor ; Degradation ; Defect creation ; Charge trapping |
| Abstract |
We have investigated the effects of electrical stress on poly-Si TFTs with different hydrogen passivation conditions. The amounts of threshod voltage shift of hydrogen passivated poly-Si TFTs are much larger than those of as-fabricated devices both under the gate only and the gate and drain bias stressing. Also, we have quantitatively analyzed the degradation phenomena by analytical method. We have suggested that the electron trapping in the gate dielectric is the dominant degradation mechanism in only gate bias stressed poly-Si TFT while the creation of defects in the channel region and poly-Si/SiO_2 interface is prevalent in gate and drain bias stressed device. |