| Title |
Efficient Switching Pattern to Decrease Switching Losses in Cascaded H-bridge PWM Multilevel Inverter |
| Authors |
정보창(Jeong, Bo Chang) ; 김선필(Kim, Sun-Pil) ; 김광수(Kim, Kwang Soo) ; 박성준(Park, Sung-Jun) ; 강필순(Kang, Feel-Soon) |
| DOI |
https://doi.org/10.5370/KIEE.2013.62.4.502 |
| Keywords |
APOD (alternative phase opposition disposition) ; Bipolar switching ; Efficiency ; Inverters ; CHML (cascaded H-bridge multilevel) ; Multilevel systems ; PD (phase disposition) ; PWM (pulse width modulation) ; SPWM (sinusoidal pulse width modulation) ; THD (total harmonic distortion) ; Unipolar switching |
| Abstract |
It presents an efficient switching pattern, which expects a reduction of switching losses in a cascaded H-bridge PWM multilevel inverter. By the proposed switching scheme, the lower H-bridge module operates at low frequency of 60[Hz] because it assigns to transfer most load power. The upper H-bridge module operates at high frequency of PWM switching to improve THD of output voltage. The proposed switching pattern applies to cascaded H-bridge multilevel inverter with PD, APOD, bipolar, and unipolar switching methods. By computer-aided simulations, we verify the validity of the proposed switching scheme. Finally, we prove that the proposed PD and APOD switching patterns are better than those of the conventional one in efficiency. |