| Title |
Analytical Study of Deep Level Trap Effects on Breakdown Voltage in 4.5 kV SiC Super Jucntion Diodes |
| Authors |
박수민(Sumin Park) ; 김상엽(Sangyeob Kim) ; 백두산(Dusan Beak) ; 윤효원(Hyowon Yoon) ; 강규혁(Gyuhyeok Kang) ; 하민우(Min-Woo Ha) ; 석오균(Ogyun Seok) |
| DOI |
https://doi.org/10.5370/KIEE.2025.74.5.899 |
| Keywords |
Silicon Carbide (SiC); High voltage; Super junction; Deep level trap; Breakdown voltage; Charge balance; Electric filed concentration; TCAD simulation |
| Abstract |
The impact of deep level traps within the bandgap on the breakdown voltage characteristics of 4.5 kV SiC super junction diodes is presented. We demonstrated through TCAD simulations that deep level traps degrade the reverse characteristics of the device and identified a degradation mechanism. Additionally, we analyzed the interactions among trap concentration, energy level, and operating temperature, and the effects of these factors on breakdown voltage. The trap behavior varied depending on the simulation conditions, leading to corresponding changes in the breakdown voltage characteristics. This study highlights that the impact of deep-level traps must be comprehensively considered during the design and fabrication stages of SiC super junction devices. |