1. Introduction

The increasing use of universal technological devices, which are one of the main sources of electrical energy consumption, has resulted from the broad deployment of 5G technology in communications and telecom networks. The source AC voltage must be rectified because these electrical equipment normally operate on DC power. Traditional AC-DC rectifiers can power these devices, but their circuit performance and power efficiency in high-power density applications limits their use ⁽¹⁾, thus they must be improved to be more energy efficient. As a result, a highly efficient AC-DC power supply with a high power factor has been changed recently.

Figure 1 depicts the overall structure of an AC-DC telecom power supply, which consists of two stages: a power factor correction (PFC) stage and a DC-DC output converter stage, which is the best option for high power performance and good energy quality ⁽²⁾, ⁽³⁾. For telecom power applications, the second stage of the telecom power supply is implemented to regulate the DC bus voltage to the desired load voltage (typically 45~63V) for the telecom power server ⁽⁴⁾, ⁽⁵⁾.

Fig. 1. The Structure of industrial two-stage telecom power supply

The isolated converter is more extensively utilized in telecom power applications because it is better suited to providing insulation and protection for connecting loads than the non-isolated converter ⁽¹¹⁾, ⁽¹²⁾. However, the Choosing of the suitable switching schematics for the converter to reduce the stress on the switches during converter operation is one of the most critical concerns in DC-DC converter circuit design. Therefore, an isolated DC-DC converters based on phase-shift PWM switching technique have recently become one of the most widely used techniques due to their ability to reduce switching losses and provide better regulation over a wide load range, particularly when zero-voltage switching (ZVS) operation is available for the converter switches. It is also possible to have high power density conversion with minimal voltage stress and modest switching losses by adopting ZVS operation ⁽¹³⁾, ⁽¹⁴⁾. Another essential consideration in the design of isolated phase shift PWM DC-DC converters with ZVS is the magentic power components design and manufacturing including the transformer and resonant inductor design and selection for providing ZVS over a wide load range to minimize switching and conduction losses ⁽¹⁵⁾.

In this paper, the design considerations and manufacturing techniques for the high frequency transformer and resonant inductor for the isolated phase shift PWM DC-DC telecom converter stage are proposed to offer conversion with ZVS and low thermal stresses, low conduction and switching losses. also, an output inductor filter to maintain output voltage ripple at the specified values is designed and manufactured. The performance of the 2kW DC-DC converter stage with using the optimized design components are simulated using the PSIM simulation to investigate the converter performance. Furthermore, the printed circuit board (PCB) with the power rating of 2kW is designed and fabricated to experimentally testing the designed DC-DC converter efficiency and to calculate the power loss budgets in the converter different power components.

The remainder of this paper is structured as follows: The optimal design analysis and manufacturing of the magnetic power components of the employed DC-DC converter stage are described in Section 2. The PSIM modeling and the simulation results are presented in Section 3. The PCB design and experimental results are shown in Section 4. Section 5 is the paper's conclusion.

2. Phase shift PWM ZVS DC-DC converter stage design

Figure 2 depicts the schematic circuit of the used telecom

Fig. 2. Schematic circuit of the interleaved PFC stage

The following subsections outline the optimal design analysis and manufacturing steps for the HF transformer, resonant inductor, and load filter inductor. The design specifications of the employed phase shift PWM ZVS DC-DC converter based on LCU+ telecom company for the 5G telecom power server are shown in Table 1.

2.2 Load (output) filter inductor design

The filter inductance value Lf is calculated using the specified ripple current ILf expressed as a percentage of the full load current (15%) as provided in Table 4's design parameters. The value of the filter inductance can be estimated using KVL in the secondary circuit of the DC-DC converter stage. The value of the filter inductance can be calculated as

(11)

$L_{f}=\dfrac{V_{load}\left(1- D_{eff}\right)}{∆I_{Lf}* f_{SW}}$

The maximum peak current (ILf pk) of a load filter inductor can be computed as

(12)

$I_{Lfpk}= I_{load}+\dfrac{∆I_{Lf}}{2}$

Using the LI2 method to select the inductor core from the Kool Mu chart as shown in Fig. 3, the single-core Kool Mu with the part number 77493 was chosen for the load filter inductor design. The number of turns (NLf) to obtain the required inductance value (Lf) can be calculated as:

(13)

$N_{Lf}=\sqrt{\dfrac{L_{f}}{A_{L_{\min}}}}$

The copper loss (PLf DCR) of the winding wire due to the inductor DCR can be calculated on a maximum value of the rms inductor filter current (ILf) as given

(14)

$I_{Lf}=\sqrt{\left(\dfrac{P_{load}}{V_{load}}\right)^{2}+\left(\dfrac{\triangle I_{Lf}}{\sqrt{3}}\right)^{2}}$

(15)

$P_{Lf_{Loss}}=I_{Lf}^{2}\times DCR$

The core losses of the inductor (PLb Core) is calculated using the given formula

(16)

$P_{Lfcore}=K_{1}\times F_{sw}^{x}\times B^{y}\times V_{e}\times 10^{-3}$

In this work, in order to design inductor which, withstand the peak current of about (39.80) A at full loading condition of about 2000W, the load filter inductor (Lf) with value of 30uF is manufactured with 16 turns of the 3-wire copper with 1.15mm diameter size around the Kool Mu 77439A9 toroids core which also reduced the equivalent DCR value by increasing the wire cross section area. The manufactured load filter inductor DCR value was experimentally measured, and it was about 0.0029Ω.

Fig. 3. Kool Mµ chart for choosing load filter inductor

2.3 Resonant inductor design and manufacturing

The size of the resonant inductor tank is determined by the amount of energy necessary to produce ZVS condition. As a result, the resonant inductance (Lr) and transformer leakage inductance (Llk) inductor values must be able to exhaust the energy provided by the parasitic capacitance of the primary switches (Coss) as well as the energy provided by the transformer winding capacitance (Cw).

(17)

$\dfrac{1}{2}I_{P}^{2}\left(L_{r}+L_{lk}\right)\ge\dfrac{4}{3}C_{oss}V_{bus}^{2}+\dfrac{1}{2}C_{w}V_{bus}^{2}$

The leakage inductance of the designed HF transformer is around 1.9uH at the primary, while the transformer winding capacitor is approximately 0.90nF. The resonant inductor to achieve the ZVS in the primary side can be calculated using these parameters.

The peak current of the resonant inductor is calculated as

(18)

$I_{Lrpk}=\dfrac{I_{Lfpk}}{a}$

Using the LI2 method to select the inductor core from the Kool Mu chart as shown in Figure 4, the single core Kool Mu with the part number 77120A7 was chosen for the load filter inductor design. The manufactured load filter inductor DCR value was experimentally measured, and it was about 0.013Ω. The number of turns (NLr) to obtain the required inductance value (Lr) can be calculated as:

(19)

$N_{Lr}=\sqrt{\dfrac{L_{r}}{A_{L_{\min}}}}$

The core losses of the resonant inductor can be using (16), and the copper loss (PLr DCR) of the winding wire due to the inductor DCR can be calculated on maximum value of the rms inductor filter current (ILr) as given

(20)

$I_{Lr}=\dfrac{I_{Lf}}{a}$

(21)

$P_{Lr_{Loss}}=I_{Lr}^{2}\times DCR$

In this work, the resonant inductor (Lr) with value of 31uF is manufactured with 22 turns of the single wire copper with 1.15mm diameter size around the Kool Mu 77120A7 toroids core. The manufactured load filter inductor DCR value was experimentally measured, and it was about 0.013Ω.

Fig. 4. Kool Mµ chart for choosing resonant inductor

The designed load filter and resonant inductors specifications for the 2kW isolated phase shift PWM ZVS DC-DC telecom converter stage are summarized in Table 2.

Table 2. specifications of the manufactured inductors

Parameter	Resonant inductor	Filter inductor
Inductance	31uF	30uF
Peak current	7.96A	39.80A
Core type	Single Kool Mu (77120A7)	Single Kool Mu (77439A9)
AL	72 ±8%(nH/T2)	135±8%(nH/T2)
No. of Turns	22	16
Winding wire	Single copper wire 1.15mm	3-Wire copper 1.15mm
DCR	0.013Ω	0.0029Ω
Ploss (W)	1.815	15.50

2.4 Control circuit implementation of the employed converter

Fig. 5. Control circuit structure of the employed phase shift PWM DC-DC converter stage.

Figure 5 depicts the control strategy for the DC-DC converter stage's voltage and current control loops, which is used to control the primary and secondary switches of the phase shift PWM DC-DC converter stage.

The phase shift PWM technique is used to control the whole bridge on the primary side of the DC-DC converter by phase shifting the switching pulses of one half-bridge with respect to the other. The ZVS method is used to achieve high power density efficient conversion at a high switching frequency in this section. Voltage-mode or current-mode control techniques can be used in this section. Because it is more efficient than voltage mode control, current-mode-controlled DC-DC switching is popular. However, when the PWM duty cycle exceeds 50%, the current-mode architecture can become unstable. To alleviate this instability and restore stability across a wide duty-cycle range, the converter's primary current slope compensation approach is used ⁽⁵⁾, ⁽⁸⁾.

The primary current and output voltage are the feedback signals in this control system. A current transformer with a 100:1 turns ratio is used to sense the primary current, which is then sampled by a resistor to obtain a primary current signal (VIp). In addition, a load voltage signal (Vo fb) is detected. A 200kHz ramp signal is added to the VIp signal to generate the primary current to compensate for the instability of current waveforms at high duty cycle values (Ip). The output voltage feedback signal (Vo fb) is compared to the appropriate reference value (Vref) and passed to the voltage PI controller to generate the primary current reference value (Ip-ref). The primary current (Ip) is then compared to the reference value (Ip-ref) to generate the duty cycle required for the phase shift PWM (PS-PWM) and synchronous rectifier PWM (SR-PWM) generators to generate the operating pulses for the primary and secondary switches.

3. Simulation Results and Discussion

PSIM software is used to investigate the performance of the employed DC-DC converter with the designed power components shown in Table 3.

Fig. 6. Input-output power waveforms with rated input voltage and full loading condition

Fig. 7. Full load voltage and current waveforms and ripple contents measurements

Fig. 8. Switches voltage and current waveforms in the two legs of the primary full bridge

4. xperimental verification

Fig. 9. The manufactured 2000W PCB for the telecom phase shift PWM DC-DC converter stage

To withstanding the high current at the output side the filter inductor is manufactured using a 3-wire conductor which increases the conductor cross-section area and reduces the equivalent inductor DCR which reduced the inductor power losses. the control circuit of the employed converter is implemented using The UCC 28950 IC from Texas Instruments which provides 4-PSPWM signals with a switching frequency of 100kHz for the primary side switches and 2-SRPWM for synchronous rectification at the secondary side switches, as well as primary current compensation to restore current stability and voltage loop control to adjust the output voltage at the specified value to control the DC-DC converter switches.

With the full loading condition and rated DC bus voltage of 400V, as shown in Fig. 10, the designed voltage control loop and the output filter capacitor regulate the output voltage to about 54.5V with a small voltage ripple of less than 100mV, also, the DC output current to about 38A with ripple current less than 30mA.

Fig. 10. Input-output voltage and output current waveforms at full loading condition.

Fig. 11. Conversion efficiency curve of the designed converter

Fig. 12. Fig. 12 Power losses budget in the different power components of the designed converter at full loading condition

5. Conclusion

In this paper, the optimal design analysis, considerations, and manufacturing techniques of the magnetic power components in the high power density telecom phase shift PWM DC-DC converter stage is proposed. The designed HF transformer and the resonant inductor maintain the operation of the primary switches with the ZVS technique which reduced the switching power losses and offers high conversion efficiency. An LC filter is utilized on the load side of the DC-DC converter which maintains the voltage and current ripple contents at the standard values required for the telecom power applications. The experimental results show that the designed DC-DC converter stage offers a maximum efficiency of 95.70% at 75% loading conditions and an efficiency of about 95.20% at full loading conditions. The 2kW, 54V phase shift PWM ZVS DC-DC converter stage with an efficiency of more than 95% which is suitable for the telecom power applications is achieved in this work.